WinUAE 2.8.2 Betas

Several updates:

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Beta 3:

Selected chipset extra didn´t match what dialog box shows (b2). This broke many configs..
CD32 FMV 16-bit display mode support.
A590/A2091, A3000, A4000T and A4091 SCSI was not initialized unless at least one device was connected (b1).
Added Picasso IV flash rom v7.4 image to rom scanner. It does not need to be called picasso_iv_flash.rom anymore.
Added Blizzard 1230-IV and 1240/1260 Boot ROMs to rom scanner. (Coming soon Blizzard 1230/40/60 unique memory layout and maprom emulation. It can be useful for developers and for testing without real board. This was supposed to be implemented in this beta but chipset extra bug required quick update)
.bin extension added to ROM scanner.


Beta 2:

Pointless CD32 Full Motion Video cartridge emulation! (Check notes below)
CD32 FMV 40.22 ROM image rom scanner checksum fixed (was from byteswapped image). ROM rescan required.
Added CD32 FMV option to Expansion panel.
Added CD32 FMV to ROM scanner result dialog.
GamePorts panel autofire always-option crashed.
CD image emulation didn´t support 2336 to 2352 sector size conversion.
CD image emulation didn´t return correct data if image had 2 data tracks back to back and tracks from second data track was requested. (Cannon Fodder CD32 FMV track)
Debugger MOVES instruction´s source and destination was swapped.
Quickstart CD image selection text box become empty after image was selected (b1)
RTG scale options didn´t work on the fly. (2.8.0)


CD32 FMV notes:

ROM requests won´t be allowed and will be deleted. ("Find" it yourself or get AmigaForever or something)
Only supports CL450 MPEG decoder commands that basic playback needs.
VCD quality is not that good: MPEG-1 with 352x288 (PAL) or 352x240 (NTSC) resolution, MPEG-1 layer 2 audio.
Requires at least null filter. (Automatically enabled)
Requires 32-bit display mode, 16-bit will work in future. (Not automatically enabled)
Tested with CD32 FMV 40.22 and 40.30 ROM versions.
Tested only with Cannon Fodder CD32 video track and one VCD movie.
Rewind or fast forward hangs the player software. (No idea why. No CL450 commands sent.)
AV sync may not be that good.
Sound buffer underflows will happen.
CL450 video window size and position values ignored, video window is always centered and automatically 1x/2x/4x scaled.
Video is 1:1 pixel mapped, aspect ratio is ignored.
Before reporting anything: make sure your Cannon Fodder CD32 image is correct. It must have 2 data tracks, check .cue file using any text editor. Plain iso also can´t work.
Config must be based on Quickstart "CD32 with Full Motion Video cartridge". Do not load old CD32 config and tick CD32 FMV expansion option. If you do it, you are on your own.


Beta 1:

Debugger TR command didn´t handle linked resident lists correctly (inverted mask..).
TO debugger command also lists FileSysStartupMsg and DosEnvec of mounted devices.
Slow down 68EC020 RTE instruction, fast clock rate multiplier modes could have executed MOVE to INTREQ + RTE combination too quickly (before Paula had cleared the interrupt) causing interrupt to re-trigger immediately after RTE.
Added SCSI controller selection to GUI and config file. ("SCSI (Auto)" does same as old plain SCSI selection = use first enabled SCSI controller).
More than 1 SCSI controller can be now active simultaneously. (For example A4000T + A4091)
Added support for two A590/A2091 and two A4091 boards, both (or even all 4) can be active at the same time.
Secondary A590/A2091 and A4091 share primary board´s boot ROM by default. a2091_2_rom_file and a4091_2_rom_file config file entry can be used to select other ROM version.
280b7 sprite update missed AGA bordersprite condition, causing clipped sprites in some situations (Silicon Graphics 2 / WFMH)
Rewritten directory filesystem Examine Next logic, now returned fib_DiskKey always have file/directory entry specific unique value. Some programs check fib_DiskKey and (incorrectly) assume that it is unique value and may also assume file must be same if both file´s have same fib_DiskKey. Now also C:List KEY output looks "correct". This needs testing because original (Tripos?) directory enumeration packet design is not that good..
AGA border sprite bit set and if same scanline had at least 1 sprite that was outside of playfield and at least 1 bitplane was active and BPLCON4 palette XOR value was non-zero: wrong background color was visible in some situations. (Nexus 7 / Andromeda "shade cluster" part)
Some BEAMCON0 programmed mode emulation updates. VBSTRT/VBSTOP register values only affect screen if VARVBEN bit is set.
Use also value stored in VBSTRT (vertical blank start) register when setting up programmed mode vertical size, some weird modes can have (much) smaller VBSTRT than VSSTRT (vertical sync start). (Jtxrules by Illusion)
HBSTRT/HBSTOP register values are only used if BPLCON3 EXTBLKEN bit is set. (Demos Contactro and Jtxrules by Illusion)
BEAMCON0 HARDDIS bit also disables DDFSTRT hardware limit. (Weird stuff, VARBEAMEN disables it too, even superhires mode disables it..)
Fixed "CPU trace blahblah" error after 68020+ state file was loaded and loaded program used bitfield instructions later.
Split ROM images didn´t load (again..) correctly if relative path mode was active.
Added support for missing Z2 RAM board sizes (64k/128k/256k/512k). Note that small boards (256k and less) can be mapped at IO autoconfig base (0xe90000+) which makes predicting final address difficult: JIT (if enabled) can´t use direct mode to access this RAM board.
Added support for second Z2 fast RAM board. Size must be smaller or same as first board. (Makes JIT board address calculation simpler)
Above two changes mean it is now possible to have total 6M of Z2 RAM in 24 bit addressing config with 2M gfx board config (4M + 2M and 2M gfx) or less useful 8M fast + extra 256k of fast config...
Z2 gfx board JIT direct calculation didn´t correctly align the board base address if Z2 RAM size was less than Z2 gfx board size.
Implemented no-hack Z3 memory mapping, lets OS handle Z3 autoconfig without patching base addressess from >=0x40000000 to >=0x10000000. This mode is not JIT Direct compatible. Option in Memory panel. Do not enable unless you know what are you doing and you really need 100% matching real hardware Z3 address mapping.
Use no-hack Z3 allocation automatically if all configured boards fit in official Z3 space, fully JIT Direct compatible. Requires 64-bit Windows and available space will be about 300M to 500M. RAM panel text string shows free space. 32-bit Chip RAM does not count, it is not Z3 board and it is always located at 0x10000000.
Added 384M and 768M 32-bit Chip RAM size options. (768M fits perfectly at 0x10000000-0x3fffffff)
Added Z3 autoconfig advanced chipset option. If ticked (or A3000/A3000T/A4000/A4000T chipset extra selected), Z33 boards will now appear at Z3 autoconfig space (0xFF000000), previously Z2 space was always used. Z2 space is supported by AOS but most real, but not all, Z3 boards use Z3 space. Optional because not all KS ROMs (for example A1200) support Z3 autoconfig space but do support Z3 boards.
Try to keep number of cylinders under 65536 when generating default geometry even if partition hardfile is very large (>100G) for better old AOS compatibility. (Helps my big partition PFS3 testing..)
Hardware (Cirrus Logic) RTG board emulation incorrectly required UAE boot ROM.
68030 MMU update from Previous, fixes some supervisor/write protect edge cases.
Added "history" menu to filesystem, hardfile and tape path selection text boxes.
Added portable mode (.ini) on/off state to Paths panel. Read-only, enabling it on the fly would cause all kinds of side-effects. Unsupported warning removed.

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Beta 4 & 5:

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Hotfix:
Added "1s pause" option to misc panel, Emulator (emulated PC) is paused for 1 second every time CPU is reset. Early start menu and CSMK3/CSPPC/BlizzardPPC boot menu can be entered very easily now. (For accelerator boot menu you need to press and release esc quickly, then press it again and keep it pressed)

Beta 5:

Big accelerator board emulation update:

Added CyberStorm MK3, CyberStorm PPC and Blizzard PPC. ! There is no PPC CPU ! Technically it emulates board with PPC CPU removed. (Which surprisingly does not seem to cause any problems, at least under emulation, real hardware may get confused if PPC chip is removed). SCSI fully supported, boot menu works, boot menu options can be modified and saved to flash, flash updater works. Map rom should work, including BlizKick.

Boot menu config is saved to flash rom which means selected flash rom will be modified, only use copy of your flash rom image (If it is writable, files inside archives are never modified).

You need to be really fast or select slower CPU mode if you want to enter boot menu (ESC key). This needs some emulator updates to allow easier way to press keys when starting emulation.

Map ROM is software selectable in boot menu, map rom option in GUI does nothing when using these boards.

Flash ROM images must have following names and must be in ROM directory because checksum based ROM detection can´t work:

CyberStorm MK3: cyberstormmk3.rom
CyberStorm PPC: cyberstormppc.rom (emulates Phase5 version that has 128k flash, DCE 512k flash version not tested)
Blizzard PPC: blizzardppc.rom (Note: flash is 512k but second half is only used for config, if rom image is 256k (size you get if you simply dump the F0 space from real hardware), it gets extended to 512k after onfig save or flash update). ROM images uploaded to the zone.
Physical flash file is updated (after flashing) only when emulator is reset or quit.


GUI/config file ROM selection will be added later. Note that real flash rom images also contain some card specific information (PPC CPU speed, serial number which also includes card type). This area is blank in rom images uploaded to the zone (they are from official flash updater, old serial is kept when flashing). blank serial does not seem to cause any problems but some software probably gets confused.

NOTE: Only Blizzards use Accelerator board memory slider, other boards use CPU Board memory slider and Accelerator board slider still needs to be set to some non-zero memory amount. (Will be fixed later).

Blizzard PPC seems to have something else in F50000 which may be important. (I only have CyberStorm PPC for testing). Blizzard is (and can´t be) JIT compatible due to high RAM addresses and RAM mirroring, CyberStorms are much more JIT friendly but it is not guaranteed to be safe. Blizzard also does not boot if MMU emulation is enabled.

Added optional FPU emulation that uses softfloat library, another feature not for normal use. Full 80-bit FP accuracy, bit-perfect results (not including trigonometric functions), supports FPU arithmetic exceptions, much slower (Uses integer algorithms, host FPU is not used).
Added mostly unmodified Qemu 53c895a SCSI emulation (originally heavily modified for 53c710 emulation). It is 53c770 compatible, 53c770 is used in CyberStorm MK3 and CyberStorm PPC.
Some 53c710 updates, Blizzard PPC SCSI driver didn´t work.
Added simple flash rom emulator.
Fastest possible CPU option is now available for cycle-exact modes. CPU internal cycles are not counted, only (mainboard) memory accesses are cycle exact (DMA steals cycles from CPU) in this mode.
68040/060 "cycle-exact" mode is back, emulates only Amiga mainboard memory accesses cycle-exactly, includes instruction(*) cache emulation. Any 32-bit fast ram or cached access is still immediate. (Which is still much closer to real 040/060 than old behavior, 040/060 is heavily bottle-necked when accessing mainboard)
68040/060 "compatible" mode now adds instruction cache emulation.
68030/040/60 MMU mode "more compatible" (68030: adds both instruction and data cache emulation, 68040/060: instruction cache only) and "cycle-exact" modes supported. (more compatible + mainboard access slowed down)
68030: data cache support is temporarily disabled. (Didn´t work with MMU for some reasonm)
DFx: eject messages appeared in new status bar even if drive was already empty.
Right-align status messages in fullscreen mode.
A2065 autoconfig was broken (b4)
b1 directory filesystem change rewritten again, removed also lots of unneeded complexity from original code.
On screen CPU halt message reason code was always 1.
Generated virtual RDB (when IDE/SCSI mounting partition hardfile) created empty string for device name.
270b6 "JIT MOVEM used direct mode if memory was direct capable but direct mode was disabled." was wrong fix, original code probably was done to work around some JIT indirect bug.. (AmiKit crash during boot if JIT is in indirect mode)


*) Instruction cache only? because emulating data cache would not make any useful difference (except to slow down emulation), data cache normally does not cache any mainboard addresses anyway.

Beta 4:

Added Blizzard 1230-IV and Blizzard 1260 board options. Do not use if you only want to run WB and other programs, it is not JIT direct compatible due to memory address space aliasing. Only emulates memory layout (which is Blizzard unique), matching CPU is not 100% required if you want to try weird configs. Map ROM is also emulated, old map rom checkbox in ROM panel enables Blizzard hardware maprom if Blizzard board is selected. Requires matching Blizzard flash ROM images. (Only difference between 1230IV and 1240/1260 is slightly different boot rom, hardware ram addresses appear to be exact same) Mostly useless, mainly meant to help development and testing. (Useful for aros m68k testing for me at least)
Added Warp Engine board emulation (It has already emulated 53C710 SCSI), autoconfig works, ROM code runs, SCSI (53C710) does not work yet, not yet sure how jumpers are mapped to board address space.
Really fixed CD32 data track checks. (CD32 Commodore Demo Disc 2.0 MPEG tracks)
Disk Swapper panel drag´n´drop or file dialog multiselect mangled file names strangely.
Added A590 XT drive emulation. A590 emulation is now complete WARNING: XT drives use real physical CHS geometry, don´t attempt to use hardfiles formatted using other controller, it won´t work in real world. (Emulation includes work around hack) Largest XT drive was 40M and protocol max limit is 511 cylinders, 15 heads and 63 sectors = ~235M. Both SCSI and XT drive can be active at the same time in same controller. Interesting fact about ROM xt.device: It uses WD33C93 Translate Address command to convert LBA to CHS which means WD33C93 chip needs to be inserted and working or XT (which has nothing to with SCSI) port won´t work.
Fixed A590/A2091 SCSI emulation crash if SCSI ID was non-zero.
Z3 autoconfig was broken (b1).
Serial port data rate register (SERPER) was not saved correctly to statefile.
Serial port transmit interrupt and transmit related status bits are now more accurately timed in cycle-exact CPU modes. (If some software really cares, probably not)
Inter-process serial port emulation added, when selected, automatically creates virtual null modem cable between two winuae processes. Uses shared memory, no latency. (Says "Master" in serial port selection menu if WinUAE instance created shared memory and "Slave" if shared memory was already created by some other instance. If nothing = something failed)
Added support for short text messages, appears in OSD bar´s unused space and windowed mode bottom bar. Currently only shows disk image eject/insert and input device autoswitch information. OSD messages won´t appear in following configurations: native mode + DirectDraw + no filter and RTG mode + DirectDraw. (In DirectDraw mode status bar is drawn directly to target surface, erasing gets annoying because it should not be read. In D3D mode it is another texture, hardware does the rest)
Added remove all button to Disk Swapper panel.
Game controllers can be now optionally kept active when winuae window is not active or minimized.
Accelerator board roms in the zone.

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WinUAE v2.9.0 (was 2.8.2) Beta 10

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Beta 10:

- Added CyberStormI/II/II/PPC and Blizzard PPC flash rom images to rom scanner, name based detection only. (Remember to click ROM rescan button) Now opens usual ROM missing dialog when flash rom image can´t be opened.
- Added GUI support for manual accelerator board ROM image selection.
- NCR53C770 emulation spurious interrupt fix.
- Reset/exit froze the emulation if PPC CPU was in sleeping state.
- Map ROM checkbox was checked if 128M CPU slot memory was configured (old bug).
- 68030 more compatible/CE with MMU does not use data cache anymore, 68030 caches logical addresses (which will get really difficult and complex to emulate), 68040+ caches physical addresses.
- CyberStorm PPC/Blizzard PPC board emulation improved, PowerUP also works.
- Do not map PPC board FFF00000 memory mirror if no on-board RAM installed.
- Generate CyberStorm/BPPC fake flash rom hardware idenfication data and serial if it is missing.
- If CyberStorm MK3/PPC flash image is 256k or larger, map it like BPPC does it. (Not sure if this is correct)
- Reset with Picasso IV enabled forced hard reset.
- Z2 RTG crash fixed (some configurations).
- Added PPC GUI option to CPU panel. If ticked, selects matching board automatically. Becomes ticked and disabled if board was already selected. 68040/060 only. (CSPPC/BPPC flash boot code uses 68040+ only instructions)
- Move PPC thread to main thread when m68k gets disabled, improves performance of native PPC operating systems. (No need to move IO access messages between threads)
- Disable RTG board if >2M chip ram configured and Z2 RTG configured. (Forgotten address conflict check)
- OSD CPU led changes to "PPC" when PPC is active and m68k is disabled.

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Beta 12:

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Beta 12:

- Windowed mode status bar button mouse click off-by-one fix.
- If command line has more than one -f/-config= parameters, config will be now reset to built-in defaults only once, before first config file is loaded.
- Updated CHD support, uncompressed CHD write support added, can be mounted as read-write hardfile. (CD subchannel support may or may not work, there does not appear to be easy way to convert ccd/sub/img combination to chd)
- CSPPC/BPPC IPL_EMU register´s M68K_IPL bits only change when PPC is interrupt master.
- b11 Blizzard accelerator Z3 autoconfig hack didn´t work correctly.
- BlizzardPPC flash mapping fixed (b11)
- 68000 mode, without CE and more compatible, RTE instruction didn´t check for odd program counter.

accelerator_roms.zip updated again, now BPPC images are full 512k, rom scanner won´t detect smaller images anymore. Manual selection still works with 256k images.

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Was going to post some great news about the latest updates to WinUAE. Toni finally added PPC emulation using the PearPC emulator, and some people have managed to get OS3.9 with WarpOS running, and now with the latest update OS 4.1 Classic! How cool is that! Finally we will be able to emulate the newer PPC demos and games.

Beta 13:

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Beta 13:

- Fixed vhd hardfiles. (b12)
- Emulated strange OCS/ECS feature similar to "SWIV scoreboard" feature (plane color > 16 becomes 16 when PF2PRI is set to invalid value). It gets more interesting if mode is dual playfield and PF2P2 is invalid: odd planes become transparent and it still hides even planes behind it if PF2PRI is set! (Running Man / Scoopex)
- A2065 buffer ram is now directly accessible, if someone wants to do some weird stuff with it (xlate and check memory functions supported)
- ROM scanner result window redesigned, all expansions that need rom images added.
- Fixed CHD CD crash when sector size conversion was required.

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New betas:

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Beta 15:

"ROM disabled" A2091/A590 ROM option was not visible (b14)
Blizzard board ROM code was ignored (b14)
Log window was opened when PPC CPU started (b14)
Dragging adf file over window mode bottom bar HD led didn´t mount it as a harddrive.
Mounting adf as a harddrive uses adf´s real volume name instead of host-side file name.
Added support for sub memory banks, can divide normal 64k UAE memory bank in to smaller sub memory banks. Mainly needed to properly map PPC CyberStorm MK3/PPC SCSI IO and SCRIPTS RAM for QEMU PPC.
SCSI CD emulation via NCR SCSI (53C94/FAS216 or NCR53C710+) chip didn´t flash CD led.
Added hack that prevents Picasso IV switching temporarily to RTG mode immediately after reset. (Picasso IV does not use simple signal passthrough like other cards)
Switch to/from hardware RTG mode only after mode has been stable at least 0.5 seconds.
Show CD insert/eject messages in new status bar message area. (Should it show real volume name instead of file name?)
Quickstart CD eject button was always disabled.
Status bar NVRAM led also shows accelerator board flash write accesses. Includes also writes that only enable chip ID read mode.

PPC IO access completely rewritten, most IO areas are now directly accessible and only special regions (custom chipset and CIA require locking. Very slow IO message passing system is completely gone.
QEMU PPC core support. Read separate notes!


QEMU PPC instructions and information: http://eab.abime.net/showthread.php?p=975129


Beta 14:

QEMU PPC is still work in progress (by Frode and me), QEMU-side is not yet included. It run for the first time few days ago. It is not stable enough yet but hopefully soon...

Autoconfig stopped immediately after first A590/A2091 board was configured.
If VHD check/validation failed after VHD type was fetched (static vs dynamic), VHD was still accepted as valid, possibly crashing soon after. HDF type variable was not cleared, bug since VHD support was added.
Automatically extend internal SCSI emulation buffer size if larger than current buffer size transfer is requested.
If 68060 and "Unimplemented CPU emu" is ticked: 68060 unimplemented instructions that are completely unimplemented (CHK2/CMP2/CAS2/MOVEP) still triggered illegal instruction exceptions.
68000/010 configuration with 32-bit address space is now allowed.
Blizzard 2060 ROM loading special case handling didn´t work. (Has odd/even parts, others don´t)
Redesigned GUI SCSI expansion ROM selection, easier to add new boards in future.
Fastlane Z3 SCSI board emulation implemented, another FAS216 based SCSI controller. z3scsi.device from phase5.a1k.org in rom scanner, but it would be nicer to have full dump. SCSI part only, memory part ignored.
Oktagon 2008 SCSI board emulated. This was interesting, it has "software DMA" (SCSI chip is told to do DMA transfer but "DMA controller" is IO space that CPU reads or writes), it also have 512 byte serial EEPROM used to store config (with only 15 bytes used). EEPROM data is internal, not saved to any file. 6.12 (last release?) boot ROM added to rom scanner. Autoconfig data is currently not confirmed. Support added only because it was quite different than most other SCSI controllers.
TekMagic 2040/2060 board added. 1.0 tekscsi2.device ROM added to ROM scanner, both odd/even pair and merged rom supported. NOTE: tekscsi2.device has a bug that does not allow RDB filesystem loading. Fast RAM expansion is not supported, it seems TekMagic fast RAM can also start from 0x02000000, not the usual 0x08000000. tools/showconfig output needed.
NCR53C710 SCRIPTS DMA wasn´t correctly started when in manual start mode. (tekscsi2.device)
Added support for non-MMU bus error caused by invalid memory accesses, including 68000/010/020 models which normally can´t generate bus errors but perhaps some expansion hardware will need it in future.
Screenshot with D3D shader filter + take screenshot before filtering ticked saved final D3D output, not original unfiltered buffer.
"SCSI (auto)" now works with all SCSI boards. Selects first SCSI board that is enabled. (In same order as select menu lists SCSI controllers)


Some code restructuring:

Autoconfig board handling rewritten yet again, removed lots of code duplication and moved most duplicated autoconfig logic from board specific files to common expansion.cpp.
Autoconfig board ROM config handling reorganized, now it is much easier to add new Z2/Z3 boards.
Replaced my hacky serial EEPROM emulation with better one from QEMU, made it generic (previously only used in CD32 emulation).
Removed A590/A2091 and A4091 Expansion panel checkboxes, enable/disable is now ROM selection. (ROM selected = enabled, ROM selection empty = not enabled)

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Beta 16:

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- GUI (and log) showed wrong size for very large drives (>1T). Visual problem only.
- Fixed F12/pause hang when PPC was active.
- Fixed uaegfx RTG in Z2 mode memory mapping (b14)
- 68040 MMU MOVE16 fault size was wrong. (Cache line, not long)
- 68060 MMU read-modify-write fault had inverted read/write status.
- QEMU PPC vs UAE side memory banks are now dynamically mapped.
- PPC CPU HID1 set to more correct value, detected CPU clock is not same as bus clock anymore.
- QEMU TCG (JIT) buffer was too small, real world PPC programs run now much faster.


NOTE: qemu-uae.zip must be also downloaded (Link in http://eab.abime.net/showthread.php?t=75062). Reset when PPC CPU is active still does not work 100% correctly.

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Next ones:

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Beta 18:


"Pause emulation when xyz" option remained forever stuck in pause mode if PPC CPU was active.
PearPC PPC emulation removed.
Freezer cartridge ROMs had disappeared from GUI.
Freezer cartridges didn´t work.
Force Direct3D mode if hardware RTG board + PPC enabled. DirectDraw has glitches. (Will also have glitches in non-PPC mode but there is no need to change it yet)
CSPPC/BPPC interrupt controller IO address accesses were not thread safe, caused random lost or stuck interrupts.


qemu-uae.dll has not changed since b17.

Beta 17:

Hard reset now forces reload of KS ROM if maprom is active, previously map rom mapped image was still in use after hard reset.
Fixed some more Z3 autoconfig bugs introduced in recent betas autoconfig updates.
Only add VirtualAlloc() MEM_TOP_DOWN flag when OS is XP. For some unknown reason with MEM_TOP_DOWN my system suddenly started giving less address space than without it..
A1000 with full KS ROM configured (instead of A1000 boot strap ROM) didn´t boot since b9.
Reset didn´t clear QEMU PPC JIT translation buffer, fixes mysterious hangs after reset.
Added main thread sleep option slider to GUI, reduces CPU usage when M68K is stopped and only PPC is active.
PPC CPU model can be manually configured using ppc_model= config entry. Can be any QEMU supported PPC CPU model name string. (Model strings are in qemu source file target-ppc/cpu-models.c)
Automatically disable m68k JIT autoconfig hack if only PPC CPU is active when autoconfig starts after reset.
Fixed WarpOS (possible PowerUP too) semi-random program hang caused by lost PPC interrupt(s).
Allow m68k JIT direct with accelerator board if board is not Blizzard model (no Blizzard memory aliases) CyberStorm PPC + m68k JIT direct at least seems to work, no guarantees.


Important: QEMU PPC libraries are now loaded from pluginsqemu. Old location is not supported anymore. Move all qemu dependency libraries and qemu-uae.dll to new path.

PPC related posts should be here: http://eab.abime.net/showthread.php?t=75062

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Beta 19:

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Restartarting and loading another config crashed if PPC or RTG without JIT direct was active.
After restarting non-JIT config, JIT direct was not available (old restriction that should have been gone few official releases ago)
Added A2620/A2630 emulation and two rom images to rom scanner. (390282-06/390283-06 and 390282-07/390283-07) Not JIT direct compatible. 68000 fall back mode causes HALT4 status. ROM special feature: right mouse button at boot = enter boot menu, in boot menu shift+m and right mouse button: enter rom monitor.
A590/A2091 word writes to DMAC WD SCSI byte registers and Z2 autoconfig registers supported. A2630 boot rom likes to do word writes to byte-size registers.
PicassoIV AGA flifi bit was set even when using non-AGA hardware. No functional changes.
Fixed RTG hardware emulation crash in some situations when switching (fullscreen) modes.


No changes to PPC emulation, which is also now considered complete (at least from my point of view), possible existing problems need to be debugged by someone else.

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New Betas:

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Beta 22:

CDTV-CR CD unit was initialized even when CDTV-CR emulation was not enabled. Broke CD access on configurations that used CD unit for other purposes.
Changed directory filesystem max file size limit (when not using 64-bit dos packets) to 4G-1. Old 2G-1 was technically official max size but most native filesystems don´t enforce it and support file sizes up to 4G-1 (at least as long as application uses unsigned integers)
Standard CD image read sector function didn´t handle (rarely used) 2336 byte CD sectors correctly.
Some statefiles have corrupt "extra_cycle" value (probably saved by some buggy beta) that causes long delay when restored, added workaround.
68000 CE mode IPL line sampling timing update. Do it during any memory access, not just prefetches.


Beta 21:

Moved CDTV-CR under original CDTV Quickstart option.
Added 3.44 CDTV-CR extended ROM.
CDTV-CR now boots CDTV CDs. CD audio player does not yet work and some games that play CD audio will hang. Also CD reading speed is currently unlimited.
Added 256M (max possible) Blizzard accelerator board RAM size support. Works with 1230, 1260 and PPC.
CSPPC P5_SELF_RESET bit emulation fixed, M68K can only reset PPC and PPC can only reset M68K if P5_SELF_RESET is not active. (Blizkick reset hang)
When switching quickstart modes, extended ROM was not reset if new mode didn´t use extended ROM.
Switching Quickstart models now remembers previously selected model configuration setting.
Disable tablet mode if tablet name query returns error or empty name. WTInfo() with null parameters is supposed to return error if tablet is not connected but it does not seem to be true with all drivers. (Fixes division by zero guru at boot if tablet emulation is enabled)
default_xlate() system halt didn´t work, broke probably when 1 second boot delay option was added.
default_xlate() now also generates bus error if Gary bus error bit is set instead of halting.
Include approximate exception startup time in non-cycle exact 68000 emulation modes.


Beta 20:

A2630 rom was not unmapped completely (only first half)
CSMK3/CSPPC/BPPC Amiga reset bit should stop the PPC before reseting the system to prevent random hangs.
CSMK3/CSPPC/BPPC switching off maprom programmatically (not hard reset) didn´t restore original KS ROM.
Added preliminary CDTV-CR emulation. Boots to title screen, preferences screen also works. Only clock and 4k (nonvolatile?) RAM emulated. No CD, no nothing else. v3.32 extended ROM added to ROM scanner, CDTV-CR option added to Quickstart.
PPC interrupt/thread-safety hang problems should be fixed.


PPC QEMUDLL updated. (http://eab.abime.net/showthread.php?t=75062)

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Beta 24:

Native code Z3 offset was wrong if Z3 mapping was using "real" mode.
CD32 NVRAM file was not automatically created (b14).
Added some accelerator board A1200 and A4000 configs to Quickstart.
Only PCM audio worked (and was always used) when recording audio in non-wave mode.
Picasso IV in Z3 mode didn´t appear in Z3 autoconfig space.
Initialize VGA chip emulation earlier, fixes emulator crash when Piccolo board is configured. (Also for some reason Piccolo and Piccolo SD boards are not used by OS4)
Too large Z2 RTG VRAM value in config file was accepted as valid.
Show user friendly message if PPC CPU is started without PPC plugin.
Disassembler decoded FMOVE.x FPy, incorrectly, FPy was wrong.
"Untrap = middle button" + "Minimize when focus is lost" + full-window mode didn´t minimize. Only windowed mode should require real lost focus to become minimized.
GUI appeared under full-window background window.
Use secondary fast RAM bank for A2620/A2630 accelerator memory, works better with other Z2 boards (like A2091)
Allow hardware unsupported (total >8M) Z2 total board size. Can happen in real world so it should be available in emulation too.
Added Z2 autoconfig address validation, log and ignore any autoconfig attempt outside of valid Z2 regions.
Added 68030 + more compatible CPU core. Previously this combination was unusable.


Beta 23:

Dragging vhd file to harddrives panel now adds it as a HDF, not a directory if it does not contain any known filesystem or RDB identifiers.
PCMCIA IDE was always mounted without drive since drive attribute update long time ago.
PCMCIA IDE and SRAM can be added (card inserted) after emulation has been started.
Replaced "JIT direct compatible" option in memory panel with more useful Z3 mapping option: Auto = Use OS mapping if possible, fall back to UAE hack if JIT direct enabled and not enough adddress space. UAE = Always use UAE hack mapping (0x10000000). NOTE: not compatible with non-m68k operating systems. This mode was always forced until 282b1. Real = Always use OS mapping (0x40000000 with alignment support), disable JIT direct if not enough address space.
Fixed missing graphics in Disposable Hero title screen in non-cycle exact modes.
Load config with statefile set, load another config without statefile, GUI shows no statefile selected but when starting emulation statefile was still loaded.
CDTV-CR CD read speed is now limited to 1x/2x.
Added CD turbo data read speed mode, affects CDTV/CDTV-CR/CD32 emulation only. SCSI CD is always in turbo mode. Checkbox in CD/Harddrives panel.
QEMU PPC module update, now all extra dependencies are statically linked. External dlls are not needed anymore (whole pluginsqemu can be deleted). Must be located at pluginsqemu-uae.dll

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Beta 25:

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- Added 1M/0.5M+0.5M chip/slow ram option checkbox to Advanced Chipset (for example in rev6 A500 it is JP2 solder pad). If hardware is configured for 1M chip without 512k slow ram, normal chip ram alias at upper 512k of chip ram address space gets replaced with "bus noise". Can be only changed when chip RAM size is less than 1M. (ECS Agnus + 512k chipram without slow ram configuration always used this option previously, now it is optional and not enabled by default)
- Map Chip RAM mirror at 0x01000000 in A2620/A2630 config, to prevent A26x0 built-in monitor program detecting huge ram expansion at 0x01000000.
- uaenet.device + slirp combination was broken (probably has always been).
- uaegfx modeid space increased, reduces modeid conflicts if host os has huge amount of modes.
- Debugger does not anymore exit stopped CPU state (STOP instruction) after exiting debugger.
- "SCSI (Auto)" priorities changed: mainboard built-in first, then accelerator board, expansions last. (Expansions was first previously)
- More accurate 68000 prefetch mode instruction cycle usage, added non-static cycle counting (mul, div etc..)
- Most CDTV-CR built-in CD audio player features, including CD+G, are now working. Media changes supported. 3.44 ROM CD player works better than 3.32.

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Beta 26: RC1, Official release date deadline is mid december. This is far too too long beta series..

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- Bumped version to 3.0.
- Directory filesystem statefile support didn´t save open file´s full path correctly if path was deeper than 2 levels from root. (Bug since directory statefile support was implemented)
- Z3 mapping mode = automatic: select always real mode if JIT is disabled.
- Added picassoiv_rom_file config file entry, if you want to use different versions or custom path.
- Off by one error in internal buffer calculation, display was shifted by 1 vertical pixel, hiding first line if window size was small enough but still big enough to fit all vertical lines.
- 68000 JMP (d8,An/PC,Xn) didn´t include extra 4 cycle idle time. (Documentation says 3 read cycles which is incorrect, correct sequence is 4 idle cycles + 2 idle cycles + prefetch + prefetch)

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Beta 27: (RC2)

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Added compatibility warning message if PPC CPU (and m68k is stopped) configures UAE filesystem autoconfig board ("UAE" controller that is needed by uaehf.device bsdsocket, uaescsi and so on)
Added download url to no ppc plugin detected message.
Minimize when inactive option should be ignored if mode is fullscreen. Only uncapturing mouse in real fullscreen mode makes no sense. (b24)
68000 MOVE to CCR/SR idle cycle count is 4 cycles, not 6.
68000 prefetch mode ("more compatible") DBcc cycle counting fixed.
68030 prefetch/"cycle-exact" mode MMU instruction exception prefetch fix. (Same as 280b1 for FPU)
68030 "fake" MMU (MMU emulation not enabled = MMU instructions do nothing), absolute address (xxx.w and xxx.l) addressing modes were marked incorrectly as invalid.
Strange immediate TST variant (TST.x #z) is valid instruction if 68020+.
Allow 24-bit address space with 68030 CPU. (Not going to touch other CPUs just yet)

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Beta 28: (RC3. Next should be final because this has enough last minute changes!)

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qemu-uae.dll updated to final 2.2.0 QEMU release. (No PPC changes)
Removed A26x0 chip ram mirror hack (b25), not needed anymore.
Copper WAIT with BFD=0 (wait for blitter enabled) sequence was incorrect, copper first waits for blitter, then it goes to normal WAIT state. Previously WAIT state check was done first, then blitter wait. It is not same because copper requires idle cycle when WAIT ends and it should be after blitter has finished, not before. (Last minute change 1)
Second last minute change: last line sprite DMA logic behavior difference between A1000 Agnus and Fat revisions. Sprite glitches are different in Skitro by Awesome/D-Tect/Vanish when run on A1000 vs OCS A500. Also fixes missing yellow glitches in same demo.
b23 "Fixed missing graphics in Disposable Hero title screen in non-cycle exact modes." broke (again) demo Back in 90 / Samplers. Added quick workaround: only do "Disposable Hero" fix if CPU is 68020+ (=works in most whdload configurations without glitches).

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